Programmable Device Circuits and Systems

R. Anitha ¹, S. Bindhu ¹, Dhanya Menon ¹, P. Jyothi ¹, P. R. Vaya ¹

Affiliations
1 Department of Electronics and Communication Engineering, Amrita Vishwa Vidyapeetham, Bangalore Campus, IN

Abstract

Switched capacitor readout is the most widely used architecture for capacitive sensing. Capacitive sensing is based on charge-voltage relationship, the same foundation on which the SC circuits operate. SC circuit provides a virtual ground and robust dc biasing at the sensing node so that the sensed signal is insensitive to parasitic capacitance and undesirable charging. In switched capacitor circuits, the sense and reference capacitors are charged with opposite polarities and a packet of charge proportional to the capacitance difference is integrated on the input feedback capacitor. In this paper, the switched capacitor technique is incorporated into a simple inverting amplifier to study its significance in submicron IC technology. Analysis on the design constraints required for SC circuits is studied in the paper. Switched capacitor readout front end circuit uses correlated double sampling technique for finite gain, noise reduction and offset cancellation. Simulations are done using 180nm level 49 library with the supply tied at 5V. Circuit achieves a noise reduction of more than 50% and a significant reduction in area is observed.

Keywords

Amplifier, Correlated Double Sampling, Noise, Switched Capacitor.

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P. Jyothi ¹, R. Anitha ¹, S. Bindhu ¹, Dhanya Menon ¹, P. R. Vaya ¹

Affiliations
1 ECE Department, Amrita School of Engineering, Bangalore-560035, IN

Abstract

Although sigma-delta concepts existed since the middle of the century, only recent advances in VLSI technologies have made possible the appropriate handling of the bit stream generated by the 1-bit ADC. The spread spectrum nature of this noise shaping modulator suppresses the error in the baseband, thus improving dynamic range in the band of interest, independent of signal frequency. Paper presents a CMOS circuit design of second order sigma delta modulator with an option of selecting the order. Comparative study of first and second order sigma delta modulators is performed and best value of OSR is selected. The circuit is simulated in HSPICE 180nm level49 library. Analysis of the noise and power results of the first and second order ΣΔ modulator leads to the design of an order switchable sigma delta modulator, which is based on the resolution of ADC.

Keywords

Noise Shaping, Oversampling, Sigma Delta Modulator, Sinc Filter, SNR.

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R. Anitha ¹, V. Bagyaveereswaran ¹

Affiliations
1 VIT University, Vellore, IN

Abstract

The developing an Application Specific Integrated Circuits (ASICs) will cost very high, the circuits should be proved and then it would be optimized before implementation. Multiplication which is the basic building block for several DSP processors, Image processing and many other. The Braun multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. This research presented the comparative study of Spartan-3E, Virtex-4, Virtex-5 and Virtex-6 Low Power FPGA devices. The implementation of Braun multipliers and its bypassing techniques is done using Verilog HDL. We are proposing that adder block which we implemented our design (fast addition) and we compared the results of that so that our proposed method is effective when compare to the conventional design. There is the reduction in the resources like delay LUTs, number of slices used. Results are showed and it is verified using the Spartan-3E, Virtex-4 and Virtex-5 devices. The Virtex-5 FPGA has shown the good performance as compared to Spartan-3E and Virtex-4 FPGA devices.

Keywords

Digital Signal Processing (DSP), Field Programmable Gate Array (FPGA), Fast Addition, Spartan-3E, Truncated Multiplier, Verilog HDL, Virtex-4, Virtex-5, Virtex–6 Low Power.

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R. Anitha ¹, V. Bagyaveereswaran ¹, G. Ramyanath

Affiliations
1 VIT University, Vellore, IN

Abstract

This paper presents a hierarchical approach for modeling an MPLS (Multi Protocol Label Switching) network. The MPLS technology is used because it offers a better performance and flexibility than IP routing. Six MPLS switches are modeled and simulated. A label is assigned to the IP packet header that indicates the route that the frame should follow. The first MPLS switch analyzes the IP header of the frame and assigns it a label which depends on its switching table. In this MPLS switch the label is considered the frame header instead of IP address. The label assigned to the frame arrives to any of the middle switches where the label is analyzed and changed by the switching table of the corresponding MPLS switch. Finally, when the packet is leaving, the MPLS network through the output switch, the label is analyzed and removed depending on the switching table. At this stage, the frame header is again the IP address. The frame continues its path outside the MPLS network. A VLSI implementation of MPLS network is done. At first, an MPLS network is simulated then it is synthesized.

Keywords

MPLS, IP Header, Switches, VLSI.

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M. Hema ¹, R. Anitha ¹

Affiliations
1 Department of Computer Applications, S. A. Engineering College, IN

Abstract

The main objective is to access, monitor and control appliances manually and automatically. As technology is advancing so houses are also getting smarter. Modern houses are gradually shifting from conventional switches to centralized control system, involving remote controlled switches. Presently, conventional wall switches located in different parts of the house makes it difficult for the user to go near them to operate. Even more it becomes more difficult for the elderly or physically handicapped people to do so. Remote controlled home automation system provides a most modern solution with smart phones. User can control the appliances through smart phones. User can control the devices through android application where the request is sent to webserver which dispatches the request to the corresponding device. Web server will detect the status of the devices and take appropriate action if needed. If temperature is higher automatically switch on air conditioners. If there is no person inside the room, then automatically switch off the fan and lights in the room. Person can be detected using motion sensor. If a person feels asleep, automatic lights off. Person image can be captured and processed to find person slept or not. Processing includes iris recognition using image processing and neural network and check person feels asleep or not. This system supports both speech and gesture recognitions.

Keywords

Wi-Fi, Sensors, Arduino, Camera, Iris, Relay, Smart phones, Neural Network.

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